The architecture of ARPEGE/IFS/ALADIN software, which must be executed in real-time, is designed to run on high performance machines, which includes machines with a large number of processors.
The research of performance is base on the Amdal’s law that shows obviously, that the developer should design the code in a way that the serial part of the code would be as cheap as possible. Beside of that, the parallel part of the code should be as efficient as possible, in order to take the maximum advantage of the shared memory machine performance.
An "Introduction to the memory-distributed aspect of the code ARPEGE/IFS/ALADIN" was presented by Ryad El Khatib during the ALADIN workshop on maintenance and phasing and a document was proposed by Ryad El Khatib on December 6, 2002 :
– Distributed Memory architecture
– More about Distributed Memory architecture
– Message Passing
– Spectral data distribution
– Gridpoint data distribution
– "B-level" distribution
– Consequences in the code
– Complications in the code
This introduction document is to be completed by the documentation provided by ECMWF (IFS technical documentation, part VI, chapter 3) and the "Distributed memory features in ARPEGE/IFS" written by Karim Yessad.